C++ systems Engineer Specializing in ultra-low-latency architectures, lock-free concurrency, and Linux kernel I/O. Linux kernel & Drogon framework contributor. Obsessed with zero-copy data paths, hardware-aware optimizations and sub 200ns execution.
From coding to chess, football, and treks – I build, strategize, collaborate, and explore.
Zero-allocation C++20 NASDAQ ITCH 5.0 Limit Order Book engine engineered for deterministic hardware performance. Replays 423M real-market messages at 7.14M msgs/sec achieving sub-200ns median latency (138ns Add, 53ns Cancel, 620ns p99.9). Implemented a custom Huge Page Slab Allocator, a cache-friendly flat OrderMap, Bitmask Tree hierarchies for O(1) price-level lookups, and strict CPU pinning.
🚀 An ultra-low-latecy C++ L7 reverser proxy built from scratch using Linux io_uring. Engineered with a zero-copy, zero-allocation hot path utilizing fixed FDs, mutlishot accept, and a kernel pipe pool- maximizing throughput at 34.7K req/s on legacy dual-core hardware at just 32% CPU utilization.
High-performance C++20 distributed rate limiter using gRPC and Redis. Features a tiered L1/L2 architecture with lock-free SPSC queues and sharded hot-path caching, achieving 180k+ req/s with sub-300ns inter-thread latency.
A wait-free SPSC (Single-Producer Single-Consumer) lock-free queue. Achieving 225M+ ops/s through cache-line alignment and acquire-release semantics.
